On-chip multiplexing pixel control circuit
Abstract:
The present invention belongs to the technical field of CMOS image sensors, and particularly relates to an on-chip multiplexing pixel control circuit for controlling a super-large area array splicing CMOS image sensor. The multiplexing type pixel control circuit includes at least one multiplexing unit, each multiplexing unit includes L levels of serial pixel control sub-circuits and a windowing address gating circuit. Through the different positions of the multiplexing units in the whole chip, the group address buffer circuits of the multiplexing units generate different group address reference signals, which are compared with a group decoding address generated in a group decoding address buffer circuit to realize group decoding and gate the multiplexing unit. Meanwhile, the serial pixel control sub-circuit in the multiplexing unit is compared with a row decoding address to realize exposure and readout control of a corresponding row of the multiplexing unit. The control circuit of the present invention is simple in structure and reliable in control, and has excellent expandability and multiplexing capability, which can be applied to CMOS image sensor chip circuits with different area array scales.
Public/Granted literature
Information query
Patent Agency Ranking
0/0