Invention Grant
- Patent Title: Three-dimensional memory device with peripheral circuit located over support pillar array and method of making thereof
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Application No.: US17184990Application Date: 2021-02-25
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Publication No.: US11641746B2Publication Date: 2023-05-02
- Inventor: Shunsuke Ohya , Sadao Fukuno , Koichi Nakamura
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Agency: The Marbury Law Group PLLC
- Main IPC: H10B43/40
- IPC: H10B43/40 ; H01L23/522 ; H01L23/528 ; H01L23/535 ; H01L21/768

Abstract:
A three-dimensional memory device includes a first alternating stack of first insulating layers and first electrically conductive layers located over a substrate, memory stack structures extending through the first alternating stack, a second alternating stack of second insulating layers and second electrically conductive layers located over the substrate and laterally spaced from the first alternating stack, a contact-level dielectric layer overlying the first alternating stack and the second alternating stack, a planar semiconductor material layer bonded to the contact-level dielectric layer and over an area of the second alternating stack, and field effect transistors located on the planar semiconductor material layer and electrically connected to the first electrically conductive layers.
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