- Patent Title: Selective accelerated sampling of failure- sensitive memory pages
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Application No.: US17715433Application Date: 2022-04-07
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Publication No.: US11644979B2Publication Date: 2023-05-09
- Inventor: Kishore Kumar Muchherla , Gary F. Besinga , Cory M. Steinmetz , Pushpa Seetamraju , Jiangang Wu , Sampath K. Ratnam , Peter Feeley
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
A processing device in a memory system assigns a memory page to a sensitivity tier of a plurality of sensitivity tiers. The processing device determines respective scan intervals for the plurality of sensitivity tiers, wherein the respective scan intervals are based on at least one characteristic of a memory device, the at least one characteristic comprising memory cell margins of the memory device. The processing device scans a subset of a plurality of memory pages, wherein the subset comprises a number of memory pages from each sensitivity tier identified according to the respective scan intervals.
Public/Granted literature
- US20220229564A1 SELECTIVE ACCELERATED SAMPLING OF FAILURE-SENSITIVE MEMORY PAGES Public/Granted day:2022-07-21
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