Invention Grant
- Patent Title: Semiconductor package and manufacturing method of semiconductor package
-
Application No.: US17315381Application Date: 2021-05-10
-
Publication No.: US11646296B2Publication Date: 2023-05-09
- Inventor: Wei-Kang Hsieh , Hung-Yi Kuo , Hao-Yi Tsai , Kuo-Lung Pan , Ting Hao Kuo , Yu-Chia Lai , Mao-Yen Chang , Po-Yuan Teng , Shu-Rong Chun
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- The original application number of the division: US16133702 2018.09.18
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/00 ; H01L25/00

Abstract:
A manufacturing method of a semiconductor package includes the following steps. At least one lower semiconductor device is provided. A plurality of conductive pillars are formed on the at least one lower semiconductor device. A dummy die is disposed on a side of the at least one lower semiconductor device. An upper semiconductor device is disposed on the at least one lower semiconductor device and the dummy die, wherein the upper semiconductor device reveals a portion of the at least one lower semiconductor device where the plurality of conductive pillars are disposed. The at least one lower semiconductor device, the dummy die, the upper semiconductor device, and the plurality of conductive pillars are encapsulated in an encapsulating material. A redistribution structure is formed over the upper semiconductor device and the plurality of conductive pillars.
Public/Granted literature
- US20210305212A1 SEMICONDCUTOR PACKAGE AND MANUFACTURING METHOD OF SEMICONDCUTOR PACKAGE Public/Granted day:2021-09-30
Information query
IPC分类: