The present application provides a shielded gate trench (SGT) semiconductor apparatus and a manufacturing method thereof. The SGT semiconductor apparatus includes a heavily N-type doped semiconductor substrate; an N-type epitaxial layer formed on the semiconductor substrate; at least one trench structure formed on the epitaxial layer and accommodating at least one gate polysilicon layer, where the trench structure includes a shielding polysilicon layer and an inter-polysilicon oxide layer; a P-type doped body and an N-type doped source layer formed on the epitaxial layer; a contact region formed for the source and the shield polysilicon connected to a source metal and the gate polysilicon connected to a gate meal. The SGT semiconductor apparatus is surrounded by a shield polysilicon termination trench; the gate polysilicon connected to the gate metal bus line is made outside the active region across the shield polysilicon termination trench.