Invention Grant
- Patent Title: Electrical isolation structure using reverse dopant implantation from source/drain region in semiconductor fin
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Application No.: US17191886Application Date: 2021-03-04
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Publication No.: US11646361B2Publication Date: 2023-05-09
- Inventor: Arkadiusz Malinowski , Alexander M. Derrickson , Haiting Wang
- Applicant: GLOBALFOUNDRIES U.S. Inc.
- Applicant Address: US CA Santa Clara
- Assignee: GlobalFoundries U.S. Inc.
- Current Assignee: GlobalFoundries U.S. Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Hoffman Warnick LLC
- Agent Francois Pagette
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/06 ; H01L21/8234 ; H01L29/78

Abstract:
A structure includes a semiconductor fin on a substrate. A first fin transistor (finFET) is on the substrate, and a second finFET is on the substrate adjacent the first finFET. The first finFET and the second finFET include respective pairs of source/drain regions with each including a first dopant of a first polarity. An electrical isolation structure is in the semiconductor fin between one of the source/drain regions of the first finFET and one of the source/drain regions for the second FinFET, the electrical isolation structure including a second dopant of an opposing, second polarity. The electrical isolation structure extends to an upper surface of the semiconductor fin. A related method is also disclosed.
Public/Granted literature
Information query
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