Invention Grant
- Patent Title: Vertical transport field-effect transistor structure having increased effective width and self-aligned anchor for source/drain region formation
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Application No.: US17458792Application Date: 2021-08-27
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Publication No.: US11646362B2Publication Date: 2023-05-09
- Inventor: Ruilong Xie , Alexander Reznicek , Takashi Ando , Pouya Hashemi
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Ryan, Mason & Lewis, LLP
- Agent Jeffrey S LaBaw
- The original application number of the division: US16548130 2019.08.22
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/08 ; H01L29/78

Abstract:
A method for manufacturing a semiconductor device includes forming a plurality of fins on a substrate. The plurality of fins each include a first portion having a first width, and a second portion having a second width greater than the first width. The method also includes forming a sacrificial layer on the substrate in a space between a first fin and a second fin of the plurality of fins, wherein the first fin and the second fin correspond to a vertical transistor. In the method, lower portions of the first and second fins are removed, and an epitaxial region is formed under remaining portions of the first and second fins. The sacrificial layer is removed from the space between the first fin and the second fin after forming the epitaxial region.
Public/Granted literature
Information query
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