A memory device includes a multi-layer stack. The multi-layer stack is disposed on a substrate and includes a plurality of first conductive lines and a plurality of dielectric layers stacked alternately, wherein each of the plurality of first conductive lines has a first side and a second side opposite to the first side. The memory device further includes a plurality of second conductive lines crossing over the plurality of first conductive lines, wherein widths of the plurality of second conductive lines are increased as the plurality of second conductive lines become far away from the first side.