Methods, systems, and devices for flexible bus management are described. A memory device may transfer data between the memory device and another device (e.g., host device) using a bus including a plurality of data pins. The memory device may transfer data according to a first bus configuration (e.g., according to a first width corresponding to using all of the data pins). After receiving an indication to adjust the configuration, the memory device may adjust the first bus configuration to a second bus configuration where the bus operates according to a second width (e.g., using a subset of the data pins). The memory device may adjust the bus width between the other device and the memory device without adjusting an internal bus width of the memory device (e.g., internal busses that transfer data from the data pins to various components within the memory device).