Invention Grant
- Patent Title: Multilayer ceramic capacitor and semiconductor device
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Application No.: US17210602Application Date: 2021-03-24
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Publication No.: US11651894B2Publication Date: 2023-05-16
- Inventor: Takahiro Hirao
- Applicant: Murata Manufacturing Co., Ltd.
- Applicant Address: JP Nagaokakyo
- Assignee: MURATA MANUFACTURING CO., LTD. MURATA MANUFACTURING
- Current Assignee: MURATA MANUFACTURING CO., LTD. MURATA MANUFACTURING
- Current Assignee Address: JP Kyoto
- Agency: Keating & Bennett, LLP
- Priority: JP 2020068180 2020.04.06
- Main IPC: H01G4/005
- IPC: H01G4/005 ; H01G4/30 ; H01G4/12 ; H01G4/248 ; H01G2/06 ; H01G4/232

Abstract:
A multilayer ceramic capacitor includes a multilayer body including dielectric layers, first inner electrodes, and second inner electrodes stacked on one another, a first outer electrode electrically connected to the first inner electrodes, and a second outer electrode electrically connected to the second inner electrodes. The multilayer body includes first and second side surfaces respectively including first and second recesses where a midsection of each of the first and second side surfaces in a length direction is recessed inward in a width direction. When the multilayer ceramic capacitor is viewed in a stacking direction, a dimension of each of the first and second recesses in the length direction is smaller on an inner side than on an outer side in the width direction.
Public/Granted literature
- US20210313113A1 MULTILAYER CERAMIC CAPACITOR AND SEMICONDUCTOR DEVICE Public/Granted day:2021-10-07
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