Invention Grant
- Patent Title: Semiconductor device and method for forming the structure of word-line avoiding short circuit thereof
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Application No.: US17202110Application Date: 2021-03-15
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Publication No.: US11652048B2Publication Date: 2023-05-16
- Inventor: Harutaka Honda
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: H01L23/528
- IPC: H01L23/528 ; G11C8/14 ; H10B12/00 ; H10B20/00
Abstract:
A semiconductor device includes a substrate, a memory cell region, a peripheral region adjacent to the memory cell region, a plurality of word-lines extending across the memory cell region and the peripheral region, and a plurality of contacts connected to edge portions of even numbered ones of the plurality of word-lines in the peripheral region, respectively.
Public/Granted literature
- US20220293510A1 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE STRUCTURE OF WORD-LINE AVOIDING SHORT CIRCUIT THEREOF Public/Granted day:2022-09-15
Information query
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