Invention Grant
- Patent Title: Charge trap evaluation method and semiconductor element
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Application No.: US16641129Application Date: 2018-08-06
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Publication No.: US11652150B2Publication Date: 2023-05-16
- Inventor: Kuniyuki Kakushima , Takuya Hoshii , Hitoshi Wakabayashi , Kazuo Tsutsui , Hiroshi Iwai , Taiki Yamamoto
- Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED
- Applicant Address: JP Tokyo
- Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
- Current Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
- Current Assignee Address: JP Tokyo
- Agency: Foley & Lardner LLP
- Priority: JP 2017161603 2017.08.24
- International Application: PCT/JP2018/029483 2018.08.06
- International Announcement: WO2019/039256A 2019.02.28
- Date entered country: 2020-02-21
- Main IPC: H01L27/01
- IPC: H01L27/01 ; H01L29/423 ; G01R31/26 ; H01L29/08 ; H01L29/778

Abstract:
Provided are a charge trap evaluation method and semiconductor device including, in an embodiment, a step for applying an initialization voltage that has the same sign as a threshold voltage and is greater than or equal to the threshold voltage between the source electrode 15 and drain electrode 16 of a semiconductor device 1 having an HEMT structure and the substrate 10 of the semiconductor device 1 and initializing a trap state by forcing out trapped charge from a trap level and a step for monitoring the current flowing between the source electrode 15 and drain electrode 16 after the trap state initialization and evaluating at least one from among charge trapping, current collapse, and charge release.
Information query
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