- Patent Title: Method for analyzing electromigration (EM) in integrated circuit
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Application No.: US17814016Application Date: 2022-07-21
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Publication No.: US11657199B2Publication Date: 2023-05-23
- Inventor: Chin-Shen Lin , Ming-Hsien Lin , Wan-Yu Lo , Meng-Xiang Lee
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: G06F30/00
- IPC: G06F30/00 ; G06F30/3308 ; G06F30/392 ; G06F119/10 ; G06F119/02

Abstract:
Methods for analyzing electromigration (EM) in an integrated circuit (IC) are provided. A layout of the IC is obtained. A metal segment is selected from the layout according to a current simulation result of the IC. Two first vias are formed over and in contact with the metal segment in the layout. EM rule is kept on the metal segment when a distance between the two first vias is greater than a threshold distance. The EM rule is relaxed on the metal segment when the distance between the two first vias is less than or equal to the threshold distance.
Public/Granted literature
- US20220358271A1 METHOD FOR ANALYZING ELECTROMIGRATION (EM) IN INTEGRATED CIRCUIT Public/Granted day:2022-11-10
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