Invention Grant
- Patent Title: Semiconductor package with dummy pattern not electrically connected to circuit pattern
-
Application No.: US17168337Application Date: 2021-02-05
-
Publication No.: US11658131B2Publication Date: 2023-05-23
- Inventor: Jin-Woo Park , Un-Byoung Kang , Jong Ho Lee
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR 20200069123 2020.06.08
- Main IPC: H01L23/14
- IPC: H01L23/14 ; H01L23/00 ; H01L23/498

Abstract:
A semiconductor package includes a first substrate including a circuit pattern and a dummy pattern on an upper face of the first substrate, a solder ball, a second substrate on the first substrate, and an underfill material layer between the first and second substrates. The underfill material layer wraps around the solder ball. The dummy pattern is not electrically connected to the circuit pattern. The first substrate includes a solder resist layer on the circuit pattern and the dummy pattern. The solder resist layer includes a first opening for exposing at least a part of the circuit pattern. The solder ball is in the first opening and electrically insulated from the dummy pattern by the solder resist layer. The second substrate is electrically connected to the first substrate by the solder ball. The second substrate is electrically insulated from the dummy pattern by the solder resist layer.
Public/Granted literature
- US20210384143A1 SEMICONDUCTOR PACKAGE Public/Granted day:2021-12-09
Information query
IPC分类: