Invention Grant
- Patent Title: Inductor structure, semiconductor package and fabrication method thereof
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Application No.: US17218059Application Date: 2021-03-30
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Publication No.: US11658134B2Publication Date: 2023-05-23
- Inventor: Chih-Yuan Chang , Jiun-Yi Wu , Chien-Hsun Lee , Chung-Shi Liu , Chen-Hua Yu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/48 ; H01L23/64 ; H01L23/00 ; H01L23/14 ; H01L23/498 ; H01L49/02 ; H01L21/48 ; H03H7/01

Abstract:
A structure includes a first via and a first conductive line embedded in a first dielectric layer and spaced apart from each other by the first dielectric layer. A first metal pattern disposed on the first via and embedded in a second dielectric layer. A first conductive via disposed on the first conductive line and embedded in the second dielectric layer. The first metal pattern and the first conductive via are spaced apart from each other and are located on a first horizontal level, and the first metal pattern has an open ring shape. A second via disposed on the first metal pattern and embedded in a third dielectric layer. An inductor structure including the first via, the first metal pattern, and the second via.
Public/Granted literature
- US20220320019A1 INDUCTOR STRUCTURE, SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF Public/Granted day:2022-10-06
Information query
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