Invention Grant
- Patent Title: Method of manufacturing a semiconductor structure
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Application No.: US17655791Application Date: 2022-03-22
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Publication No.: US11659707B2Publication Date: 2023-05-23
- Inventor: Ching-Chia Huang , Wei-Ming Liao
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agency: CKC & Partners Co., LLC
- The original application number of the division: US16792157 2020.02.14
- Main IPC: H10B12/00
- IPC: H10B12/00 ; H01L23/528 ; H01L29/49 ; H01L29/08 ; H01L23/532 ; H01L21/306

Abstract:
A method of manufacturing a semiconductor structure includes providing a substrate having an active region surrounded by an isolation layer; forming a first trench and a second trench in the active region, and a third trench and a fourth trench in the isolation layer; forming a bottom work-function layer in the third trench and the fourth trench, respectively; forming a middle work-function layer on the bottom work-function layer and in the first and the second trenches; forming a top work-function layer on the middle work-function layer; and forming a capping layer on the top work-function layer that fills a remaining region of the first, the second, the third and the fourth trenches.
Public/Granted literature
- US20220216213A1 METHOD OF MANUFACTURING A SEMICONDUCTOR STRUCTURE Public/Granted day:2022-07-07
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