- Patent Title: Nanostructure field-effect transistor device and method of forming
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Application No.: US17226599Application Date: 2021-04-09
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Publication No.: US11670550B2Publication Date: 2023-06-06
- Inventor: Guan-Lin Chen , Kuo-Cheng Chiang , Shi Ning Ju , Jung-Chien Cheng , Chih-Hao Wang , Kuan-Lun Cheng
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L29/423 ; H01L29/66 ; H01L29/786 ; H01L29/06

Abstract:
A method of forming a semiconductor device includes: forming a fin structure protruding above a substrate, where the fin structure comprises a fin and a layer stack overlying the fin, where the layer stack comprises alternating layers of a first semiconductor material and a second semiconductor material; forming a dummy gate structure over the fin structure; forming openings in the fin structure on opposing sides of the dummy gate structure, where the openings extend through the layer stack into the fin; forming a dielectric layer in bottom portions of the openings; and forming source/drain regions in the openings on the dielectric layer, where the source/drain regions are separated from the fin by the dielectric layer.
Public/Granted literature
- US20220230922A1 Nanostructure Field-Effect Transistor Device and Method of Forming Public/Granted day:2022-07-21
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