Invention Grant
- Patent Title: Control logic performance optimizations for universal serial bus power delivery controller
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Application No.: US17463339Application Date: 2021-08-31
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Publication No.: US11671013B2Publication Date: 2023-06-06
- Inventor: Arun Khamesra , Hariom Rai , Rajesh Karri , Pulkit Shah
- Applicant: Cypress Semiconductor Corporation
- Applicant Address: US CA San Jose
- Assignee: Cypress Semiconductor Corporation
- Current Assignee: Cypress Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: H02M3/158
- IPC: H02M3/158 ; H03F3/45

Abstract:
An IC controller for USB Type-C device includes an error amplifier (EA), which includes an EA output coupled to a PWM comparator of a buck-boost converter; a first transconductance amplifier to adjust a current at the EA output, the first transconductance amplifier operating in a constant voltage mode; and a second transconductance amplifier to adjust the current at the EA output, the second transconductance amplifier operating in a constant current mode. A first set of programmable registers is to store a first set of increasingly higher transconductance values. A second set of programmable registers is to store a second set of increasingly higher transconductance values. Control logic is to: cause the first transconductance amplifier to operate while sequentially using transconductance values stored in the first set of programmable registers; and cause the second transconductance amplifier to operate while sequentially using transconductance values stored in the second set of programmable registers.
Public/Granted literature
- US20220069713A1 CONTROL LOGIC PERFORMANCE OPTIMIZATIONS FOR UNIVERSAL SERIAL BUS POWER DELIVERY CONTROLLER Public/Granted day:2022-03-03
Information query
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