Invention Grant
- Patent Title: Systems, methods, and apparatuses to control CPU speculation for the prevention of side-channel attacks
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Application No.: US16236049Application Date: 2018-12-28
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Publication No.: US11675594B2Publication Date: 2023-06-13
- Inventor: Robert S. Chappell , Jason W. Brandt , Alan Cox , Asit Mallick , Joseph Nuzman , Arjan Van De Ven
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Nicholson De Vos Webster & Elliott, LLP
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F9/38 ; G06F21/55
Abstract:
Embodiments of instructions are detailed herein including one or more of 1) a branch fence instruction, prefix, or variants (BFENCE); 2) a predictor fence instruction, prefix, or variants (PFENCE); 3) an exception fence instruction, prefix, or variants (EFENCE); 4) an address computation fence instruction, prefix, or variants (AFENCE); 5) a register fence instruction, prefix, or variants (RFENCE); and, additionally, modes that apply the above semantics to some or all ordinary instructions.
Public/Granted literature
- US20190324756A1 SYSTEMS, METHODS, AND APPARATUSES TO CONTROL CPU SPECULATION FOR THE PREVENTION OF SIDE-CHANNEL ATTACKS Public/Granted day:2019-10-24
Information query
