Invention Grant
- Patent Title: Interconnect structure
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Application No.: US16939625Application Date: 2020-07-27
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Publication No.: US11676853B2Publication Date: 2023-06-13
- Inventor: Hung-Chih Yu , Chien-Mao Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- The original application number of the division: US15652699 2017.07.18
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/522 ; H01L23/528 ; H01L21/02 ; H01L23/532

Abstract:
A method includes: forming a first conductive structure in a first dielectric layer; forming a conductive protection structure that is coupled to at least part of the first conductive structure; forming a second dielectric layer over the first dielectric layer; forming a via hole extending through at least part of the second dielectric layer to expose a portion of the conductive protection structure; cleaning the via hole; and refilling the via hole with a conductive material to form a via structure.
Information query
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