Invention Grant
- Patent Title: Semiconductor device including cumulative sealing structures and method and system for making of same
-
Application No.: US17214275Application Date: 2021-03-26
-
Publication No.: US11676958B2Publication Date: 2023-06-13
- Inventor: Liang-Chen Lin
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H01L23/522 ; G06F30/392 ; H01L23/00 ; H01L23/58

Abstract:
A semiconductor device includes: first and second core regions; first and second input/output (I/O) regions coupled to each other and to the first and second core regions; the first and second I/O regions being between an expendable region and correspondingly the first and second core regions; a sealing ring surrounding the core regions and the I/O regions; metallization layers and interconnection layers; inter-communication (inter-com) segments extending between the I/O regions; first and second parapets which extend from the first to third sides of the sealing ring or from first to second locations on corresponding third and fourth parapets, the latter extending from the first to third sides of the sealing ring; the first parapet being between the first core region and the first I/O region; and the second parapet being between the second core region and the second I/O region.
Public/Granted literature
- US20220310585A1 SEMICONDUCTOR DEVICE INCLUDING CUMULATIVE SEALING STRUCTURES AND METHOD AND SYSTEM FOR MAKING OF SAME Public/Granted day:2022-09-29
Information query
IPC分类: