One or more embodiments of a successive approximation type analog-to-digital converter that converts an analog input into a digital conversion value and outputs the digital conversion value, may include: a capacitance DAC that generates a bit-by-bit potential based on an analog input; a comparator that compares the potential generated by the capacitance DAC, wherein the comparator is a memory cell rewriting type, the comparator includes a first stage current mirror type operational amplifier; and a second stage memory cell; a conversion data generator that generates conversion data of resolution bits based on a comparison result of the comparator; and a correction circuit that corrects an output error of the conversion data caused by an offset error of the comparator by adding or subtracting an offset correction value that is a fixed value, and outputs the conversion data as a digital conversion value.