A semiconductor device includes first, second, third, fourth, and fifth active regions each extending lengthwise along a first direction, wherein the first, second, third, and fourth active regions comprise channel regions and source/drain (S/D) regions of first, second, third, and fourth transistors respectively, and the fifth active region comprises channel regions and S/D regions of fifth and sixth transistors; and first, second, third, fourth, fifth, and sixth gates each extending lengthwise along a second direction perpendicular to the first direction, wherein the first through sixth gates are configured to engage the channel regions of the first through sixth transistors respectively, wherein the first, second, and fifth gates are electrically connected, and wherein one of the S/D regions of the first transistor, one of the S/D regions of the second transistor, the third gate, and the fourth gate are electrically connected.