Invention Grant
- Patent Title: Method for enhancing the semiconductor manufacturing yield
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Application No.: US16326172Application Date: 2017-08-14
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Publication No.: US11681279B2Publication Date: 2023-06-20
- Inventor: Wei Fang
- Applicant: ASML Netherlands B.V.
- Applicant Address: NL AH Veldhoven
- Assignee: ASML Netherlands B.V.
- Current Assignee: ASML Netherlands B.V.
- Current Assignee Address: NL Veldhoven
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, LLP
- International Application: PCT/EP2017/070567 2017.08.14
- International Announcement: WO2018/033511A 2018.02.22
- Date entered country: 2019-02-15
- Main IPC: G05B19/418
- IPC: G05B19/418

Abstract:
Embodiments of the present disclosure provide systems and methods for enhancing the semiconductor manufacturing yield. Embodiments of the present disclosure provide a yield improvement system. The system comprises a training tool configured to generate training data based on receipt of one or more verified results of an inspection of a first substrate. The system also comprises a point determination tool configured to determine one or more regions on a second substrate to inspect based on the training data, weak point information for the second substrate, and an exposure recipe for a scanner of the second substrate.
Public/Granted literature
- US20190187670A1 METHOD FOR ENHANCING THE SEMICONDUCTOR MANUFACTURING YIELD Public/Granted day:2019-06-20
Information query
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