Invention Grant
- Patent Title: Switching transistor and semiconductor module to suppress signal distortion
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Application No.: US17047453Application Date: 2019-03-20
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Publication No.: US11682720B2Publication Date: 2023-06-20
- Inventor: Satoshi Taniguchi , Masashi Yanagita , Katsuhiko Takeuchi , Shigeru Kanematsu , Takanori Higashi
- Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Applicant Address: JP Kanagawa
- Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Current Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Current Assignee Address: JP Kanagawa
- Agency: Chip Law Group
- Priority: JP 2018086845 2018.04.27
- International Application: PCT/JP2019/011679 2019.03.20
- International Announcement: WO2019/208034A 2019.10.31
- Date entered country: 2020-10-14
- Main IPC: H01L29/778
- IPC: H01L29/778 ; H01L29/45 ; H01L29/49 ; H01L29/66 ; H01L29/786 ; H01L21/02 ; H01L21/28

Abstract:
[Overview] [Problem to be Solved] To provide a switching transistor and a semiconductor module having lower distortion generated in a signal. [Solution] A switching transistor including: a channel layer including a compound semiconductor and having sheet electron density equal to or higher than 1.7×1013 cm−2; a barrier layer formed on the channel layer by using a compound semiconductor that is of a different type from the channel layer; a gate electrode provided on the barrier layer; and a source electrode and a drain electrode provided on the barrier layer with the gate electrode interposed between the source electrode and the drain electrode.
Public/Granted literature
- US20210111277A1 SWITCHING TRANSISTOR AND SEMICONDUCTOR MODULE Public/Granted day:2021-04-15
Information query
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