Invention Grant
- Patent Title: Connector via structures for nanostructures and methods of forming the same
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Application No.: US16910125Application Date: 2020-06-24
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Publication No.: US11682730B2Publication Date: 2023-06-20
- Inventor: Li-Zhen Yu , Chia-Hao Chang , Lin-Yu Huang , Cheng-Chi Chuang , Chih-Hao Wang
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: The Marbury Law Group, PLLC
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/417 ; H01L29/423 ; H01L29/66 ; H01L23/522 ; H01L23/528 ; H01L29/49
Abstract:
A semiconductor nanostructure and an epitaxial semiconductor material portion are formed on a front surface of a substrate, and a planarization dielectric layer is formed thereabove. Recess cavities are formed to expose a first active region and the epitaxial semiconductor material portion. A metallic cap structure is formed on the first active region, and a sacrificial metallic material portion is formed on the epitaxial semiconductor material portion. A connector via cavity is formed by anisotropically etching the sacrificial metallic material portion and an underlying portion of the epitaxial semiconductor material portion while the metallic cap structure is masked with a hard mask layer. A connector via structure is formed in the connector via cavity. Front-side metal interconnect structures are formed on the connector via structure and the metallic cap structure, and a backside via structure is formed through the substrate on the connector via structure.
Public/Granted literature
- US20210408274A1 CONNECTOR VIA STRUCTURES FOR NANOSTRUCTURES AND METHODS OF FORMING THE SAME Public/Granted day:2021-12-30
Information query
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