Invention Grant
- Patent Title: Input and digital output mechanisms for analog neural memory in a deep learning artificial neural network
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Application No.: US17121555Application Date: 2020-12-14
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Publication No.: US11683933B2Publication Date: 2023-06-20
- Inventor: Hieu Van Tran , Steven Lemke , Vipin Tiwari , Nhan Do , Mark Reiten
- Applicant: Silicon Storage Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: SILICON STORAGE TECHNOLOGY, INC.
- Current Assignee: SILICON STORAGE TECHNOLOGY, INC.
- Current Assignee Address: US CA San Jose
- Agency: DLA Piper LLP US
- Main IPC: H01L27/11531
- IPC: H01L27/11531 ; G06N3/08 ; G11C16/04 ; H01L29/788

Abstract:
Numerous embodiments for reading a value stored in a selected memory cell in a vector-by-matrix multiplication (VMM) array in an artificial neural network are disclosed. In one embodiment, an input comprises a set of input bits that result in a series of input pulses applied to a terminal of the selected memory cell, further resulting in a series of output signals that are summed to determine the value stored in the selected memory cell. In another embodiment, an input comprises a set of input bits, where each input bit results in a single pulse or no pulse being applied to a terminal of the selected memory cell, further resulting in a series of output signals which are then weighted according to the binary bit location of the input bit, and where the weighted signals are then summed to determine the value stored in the selected memory cell.
Public/Granted literature
- US11729970B2 Input and digital output mechanisms for analog neural memory in a deep learning artificial neural network Public/Granted day:2023-08-15
Information query
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