A memory controller controls a memory device including a plurality of memory blocks. The memory controller is configured to: control the memory device to store data in a first area among areas of the memory device using a single level cell method, wherein the data are corresponded to a write booster request which is received from a host, perform a wear leveling operation, based on a size of the data stored in the first area, a program-erase count of each of memory blocks of the first area, and a number of free blocks in the memory device and form a mapping relationship between a logical block address, which is received from the host, and a physical block address corresponding the first area.