Invention Grant
- Patent Title: Memory sub-system with internal logic to perform a machine learning operation
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Application No.: US16601381Application Date: 2019-10-14
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Publication No.: US11694076B2Publication Date: 2023-07-04
- Inventor: Amit Gattani , Poorna Kale
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G05B13/02
- IPC: G05B13/02 ; G06G7/00 ; G06E1/00 ; G06N3/08 ; G06N3/04 ; G06F13/16

Abstract:
A memory component can include memory cells where a first region of the memory cells is to store a machine learning model and a second region of the memory cells is to store input data and output data of a machine learning operation. A controller can be coupled to the memory component with one more internal buses to perform the machine learning operation by applying the machine learning model to the input data to generate the output data.
Public/Granted literature
- US20210110251A1 MEMORY SUB-SYSTEM WITH INTERNAL LOGIC TO PERFORM A MACHINE LEARNING OPERATION Public/Granted day:2021-04-15
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