Invention Grant
- Patent Title: Logic compatible flash memory programming with a pulse width control scheme
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Application No.: US16951927Application Date: 2020-11-18
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Publication No.: US11694751B2Publication Date: 2023-07-04
- Inventor: Seung-Hwan Song
- Applicant: Seung-Hwan Song
- Applicant Address: US CA Palo Alto
- Assignee: SEMIBRAIN INC.
- Current Assignee: SEMIBRAIN INC.
- Current Assignee Address: KR Seongnam-si
- Main IPC: G11C16/34
- IPC: G11C16/34 ; G11C16/10

Abstract:
A selective non-volatile memory programming method for a selected memory cell in a memory array is described so as to reduce or avoid program disturbance on an unselected memory cell. This selective programming method comprises: applying a programming pulse to a selected memory cell to be programmed and an unselected memory cell, wherein the programming pulse allows a change of the unselected memory cell within a range specified; boosting a region of the unselected memory cell; and setting a threshold time of the programming pulse, wherein the threshold time is defined when an absolute magnitude of a voltage difference between a floating gate of the unselected memory cell and the boosted region of the unselected memory cell reaches a threshold value defined.
Public/Granted literature
- US20210166763A1 LOGIC COMPATIBLE FLASH MEMORY PROGRAMMING WITH A PULSE WIDTH CONTROL SCHEME Public/Granted day:2021-06-03
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