Invention Grant
- Patent Title: Bridge interconnection with layered interconnect structures
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Application No.: US17410716Application Date: 2021-08-24
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Publication No.: US11694960B2Publication Date: 2023-07-04
- Inventor: Yueli Liu , Qinglei Zhang , Amanda E. Schuckman , Rui Zhang
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- The original application number of the division: US13903828 2013.05.28
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L23/00 ; H01L25/065 ; H05K1/18 ; H01L23/532 ; H01L25/18 ; H05K3/34

Abstract:
Embodiments of the present disclosure are directed towards techniques and configurations for layered interconnect structures for bridge interconnection in integrated circuit assemblies. In one embodiment, an apparatus may include a substrate and a bridge embedded in the substrate. The bridge may be configured to route electrical signals between two dies. An interconnect structure, electrically coupled with the bridge, may include a via structure including a first conductive material, a barrier layer including a second conductive material disposed on the via structure, and a solderable material including a third conductive material disposed on the barrier layer. The first conductive material, the second conductive material, and the third conductive material may have different chemical composition. Other embodiments may be described and/or claimed.
Public/Granted literature
- US20210384129A1 BRIDGE INTERCONNECTION WITH LAYERED INTERCONNECT STRUCTURES Public/Granted day:2021-12-09
Information query
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