Invention Grant
- Patent Title: Multi-gated I/O system, semiconductor device including and method for generating gating signals for same
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Application No.: US17544953Application Date: 2021-12-08
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Publication No.: US11695414B2Publication Date: 2023-07-04
- Inventor: Shao-Te Wu , Chia-Jung Chang , Shih-Peng Chang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: H03K3/012
- IPC: H03K3/012 ; H03K5/00 ; H03K17/22 ; H03K19/003 ; H03K17/687 ; G06F30/392 ; H03K19/0175

Abstract:
A method of generating multiple gating signals for a multi-gated input/output (I/O) system. The system includes an output level shifter and an output driver which are coupled in series between an output node of a core circuit and an external terminal of a corresponding system. The method includes: generating first and second gating signals having corresponding first and second waveforms, the first waveform transitioning from a non-enabling state to an enabling state before the second waveform transitions from the non-enabling state to the enabling state; receiving the first gating signal at the output level shifter; and receiving the second gating signal at the output driver.
Public/Granted literature
- US20220103171A1 MULTI-GATED I/O SYSTEM, SEMICONDUCTOR DEVICE INCLUDING AND METHOD FOR GENERATING GATING SIGNALS FOR SAME Public/Granted day:2022-03-31
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