中科微点-全球专利检索

  1. Login
  2. Sign Up
Invention Grant
US11695422B2 Delay line, a delay locked loop circuit and a semiconductor apparatus using the delay line and the delay locked loop circuit 有权

Delay line, a delay locked loop circuit and a semiconductor apparatus using the delay line and the delay locked loop circuit
Abstract:
A delay locked loop circuit includes a first delay locked loop and a second delay locked loop having different characteristics. The first delay locked loop performs a delay-locking operation on a reference clock signal to generate a delay locked clock signal. The second delay locked loop performs a delay-locking operation on the delay locked clock signal to generate an internal clock signal.
Information query
Espacenet
Patent Agency Ranking
0/0