Invention Grant
- Patent Title: Three tiered hierarchical memory systems
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Application No.: US17382953Application Date: 2021-07-22
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Publication No.: US11698862B2Publication Date: 2023-07-11
- Inventor: Vijay S. Ramesh , Anton Korzh , Richard C. Murphy , Scott Matthew Stephens
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: G06F12/02
- IPC: G06F12/02 ; G06F12/0811 ; G06F3/06

Abstract:
Systems, apparatuses, and methods related to three tiered hierarchical memory systems are described herein. A three tiered hierarchical memory system can leverage persistent memory to store data that is generally stored in a non-persistent memory, thereby increasing an amount of storage space allocated to a computing system at a lower cost than approaches that rely solely on non-persistent memory. An example apparatus may include a persistent memory, and one or more non-persistent memories configured to map an address associated with an input/output (I/O) device to an address in logic circuitry prior to the apparatus receiving a request from the I/O device to access data stored in the persistent memory, and map the address associated with the I/O device to an address in a non-persistent memory subsequent to the apparatus receiving the request and accessing the data.
Public/Granted literature
- US20210349822A1 THREE TIERED HIERARCHICAL MEMORY SYSTEMS Public/Granted day:2021-11-11
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