Invention Grant
- Patent Title: Memory system including parities written to dummy memory cell groups
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Application No.: US17187705Application Date: 2021-02-26
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Publication No.: US11699499B2Publication Date: 2023-07-11
- Inventor: Tsukasa Tokutomi , Kiwamu Watanabe , Riki Suzuki , Toshikatsu Hida , Takahiro Onagi
- Applicant: KIOXIA CORPORATION
- Applicant Address: JP Tokyo
- Assignee: Kioxia Corporation
- Current Assignee: Kioxia Corporation
- Current Assignee Address: JP Tokyo
- Agency: Kim & Stewart LLP
- Priority: JP 20149839 2020.09.07
- Main IPC: G11C29/42
- IPC: G11C29/42 ; G11C29/24 ; G11C29/44 ; G11C29/12

Abstract:
According to one embodiment, a memory system includes a memory controller and a nonvolatile memory with multiple planes each provided with multiple word lines, memory cell groups, dummy word lines, and dummy memory cell groups. The memory controller writes data to a memory cell group connected to a corresponding word line of any of the planes, such that a plane to which k-th data are to be written is different from a plane to which (k+m−1)-th data are to be written, and writes the parities to any of the dummy memory cell groups. The combinations of the data used for generating the different parities are different from each other.
Public/Granted literature
- US20220076773A1 MEMORY SYSTEM Public/Granted day:2022-03-10
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