Invention Grant
- Patent Title: Preparation method for accurate pattern of integrated circuit
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Application No.: US17417149Application Date: 2019-12-10
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Publication No.: US11699594B2Publication Date: 2023-07-11
- Inventor: Hanming Wu
- Applicant: Etownip Microelectronics (Beijing) Co., LTD.
- Applicant Address: CN Beijing
- Assignee: Etownip Microelectronics (Beijing) Co., LTD.
- Current Assignee: Etownip Microelectronics (Beijing) Co., LTD.
- Current Assignee Address: CN Beijing
- Agency: Xinsheng Wang, Patent Attorney
- Priority: CN 1811620602.1 2018.12.28
- International Application: PCT/CN2019/124217 2019.12.10
- International Announcement: WO2020/135012A 2020.07.02
- Date entered country: 2021-06-22
- Main IPC: H01L21/311
- IPC: H01L21/311 ; H01L21/463

Abstract:
A method for preparing precise pattern of integrated circuits, which comprises the following steps: (S1) preparing a large pitch trench or circular through-hole structure with a hard mask in a first dielectric layer by lithography and etching; (S2) forming micro trench on the hard mask of the second dielectric layer at the bottom side wall of the trench or circular through-hole structure by plasma etching process; (S3) removing the first dielectric layer; (S4) opening the hard mask of the second dielectric layer at the micro trench formed on the hard mask of the second dielectric layer by plasma etching process; (S5) small pitch trench or circular through holes are prepared in the second dielectric layer.
Information query
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