Memory device with air gaps for reducing capacitive coupling
Abstract:
The present application provides a memory device with an air gap. The memory device includes an active region disposed in a substrate; a word line disposed in the substrate, wherein the word line is intersected with the active region; a contact structure disposed on the substrate, wherein the contact structure is located at a side of the word line, and electrically connected to the active region; a first conductive layer and a second conductive layer disposed over the substrate, wherein the contact structure is covered by the first and second conductive layers; a conductive pillar overlapped with and electrically connected to the contact structure; a landing pad covers and electrically connects to the conductive pillar, wherein a sidewall of the conductive pillar is laterally recessed from a sidewall of the landing pad; and a dielectric layer laterally surrounding the conductive pillar and the landing pad.
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