Invention Grant
- Patent Title: Semiconductor device and voltage generation method
-
Application No.: US17702466Application Date: 2022-03-23
-
Publication No.: US11714440B2Publication Date: 2023-08-01
- Inventor: Tetsuo Oomori
- Applicant: LAPIS TECHNOLOGY CO., LTD
- Applicant Address: JP Yokohama
- Assignee: LAPIS TECHNOLOGY CO., LTD.
- Current Assignee: LAPIS TECHNOLOGY CO., LTD.
- Current Assignee Address: JP Yokohama
- Agency: Volentine, Whitt & Francos, PLLC
- Priority: JP 21059107 2021.03.31
- Main IPC: G05F1/56
- IPC: G05F1/56

Abstract:
A semiconductor device includes first to N-th voltage output circuits each outputting an output voltage and outputs a feedback voltage having a voltage value corresponding to the output voltage, and a differential circuit including first to N-th primary side transistors to which N feedback voltages are input and that individually flow first to N-th currents through a first node, a secondary side transistor that flows a reference current corresponding to a reference voltage through the first node, and a current mirror circuit as an active load. The current mirror circuit includes first to N-th primary side load transistors individually coupled in cascade to the first to N-th primary side transistors, a secondary side load transistor coupled in cascade to the secondary side transistor and generates a voltage at a connection point between the secondary side transistor and the secondary side load transistor as a control voltage.
Public/Granted literature
- US20220317711A1 SEMICONDUCTOR DEVICE AND VOLTAGE GENERATION METHOD Public/Granted day:2022-10-06
Information query
IPC分类: