Invention Grant
- Patent Title: Trims for memory performance targets of applications
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Application No.: US17049276Application Date: 2020-06-05
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Publication No.: US11714547B2Publication Date: 2023-08-01
- Inventor: Minjian Wu
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- International Application: PCT/CN2020/094651 2020.06.05
- International Announcement: WO2021/243700A 2021.12.09
- Date entered country: 2020-10-20
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F3/06 ; G06F9/50

Abstract:
A memory sub-system can receive a definition of a performance target for each of a number of applications that use the memory sub-system for storage. The memory sub-system can create a plurality of partitions according to the definitions and assign each of the partitions to a block group. The memory sub-system can operate each block group with a trim tailored to the performance target corresponding to that block group and application.
Public/Granted literature
- US20230126523A1 TRIMS FOR MEMORY PERFORMANCE TARGETS OF APPLICATIONS Public/Granted day:2023-04-27
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