Invention Grant
- Patent Title: Dynamic background scan optimization in a memory sub-system
-
Application No.: US17865686Application Date: 2022-07-15
-
Publication No.: US11714580B2Publication Date: 2023-08-01
- Inventor: Gerald L. Cadloni , Michael Sheperek , Francis Chew , Bruce A. Liikanen , Larry J. Koudele
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F11/10 ; G06F13/16 ; G06F13/42 ; G11C29/52 ; G06F12/02 ; G11C29/04

Abstract:
Aspects of the present disclosure are directed to performing varying frequency memory sub-system background scans using either or both a timer and an I/O event limit. This can be accomplished by identifying a background scan trigger event from one of multiple possible types of background scan trigger events, such as a timer expiration or reaching an event count limit. In response to the background scan trigger event, a background scan can be initiated on a memory portion. The background scan can produce results, such as CDF-based data. When a metric based on the results exceeds a background scan limit, a refresh relocation can be performed and logged. A metric can be generated based on the CDF-based data, obtained error recovery depth data, or refresh relocation event data. When the metric is above or below corresponding background scan thresholds, a background scan frequency can be adjusted.
Public/Granted literature
- US20220350538A1 DYNAMIC BACKGROUND SCAN OPTIMIZATION IN A MEMORY SUB-SYSTEM Public/Granted day:2022-11-03
Information query