- Patent Title: Providing data of a memory system based on an adjustable error rate
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Application No.: US17544772Application Date: 2021-12-07
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Publication No.: US11714710B2Publication Date: 2023-08-01
- Inventor: Mustafa N. Kaynak , Larry J. Koudele , Michael Sheperek , Patrick R. Khayat , Sampath K. Ratnam
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G06F3/06 ; G11C29/52

Abstract:
A first data stored at a first portion of a memory cell and a second data stored at a second portion of the memory cell are identified. A first error rate associated with first data stored at the first portion of the memory cell is determined. The first error rate is adjusted to exceed a second error rate associated with the second data stored at the second portion of the memory cell. A determination is made as to whether the first error rate exceeds a threshold. The second data stored at the second portion of the memory cell is provided for use in an error correction operation by a controller associated with the memory cell in response to determining that the first error rate exceeds the threshold.
Public/Granted literature
- US20220091935A1 PROVIDING DATA OF A MEMORY SYSTEM BASED ON AN ADJUSTABLE ERROR RATE Public/Granted day:2022-03-24
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