Invention Grant
- Patent Title: Methods and nodes for handling memory
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Application No.: US17309657Application Date: 2018-12-13
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Publication No.: US11714753B2Publication Date: 2023-08-01
- Inventor: Amir Roozbeh , Alireza Farshin , Dejan Kostic , Gerald Q Maguire, Jr.
- Applicant: Telefonaktiebolaget LM Ericsson (publ)
- Applicant Address: SE Stockholm
- Assignee: Telefonaktiebolaget LM Ericsson (publ)
- Current Assignee: Telefonaktiebolaget LM Ericsson (publ)
- Current Assignee Address: SE Stockholm
- Agency: Nicholson De Vos Webster & Elliott LLP
- International Application: PCT/SE2018/051311 2018.12.13
- International Announcement: WO2020/122779A 2020.06.18
- Date entered country: 2021-06-11
- Main IPC: G06F12/0806
- IPC: G06F12/0806

Abstract:
A method in a multi-core processing system which comprises a processor comprising at least a first and a second processing unit, a cache, common to the first and the second processing unit, comprising a first cache portion associated with the first processing unit and a second cache portion associated with the second processing unit, a memory, comprising a first memory portion associated with the first cache portion and a second memory portion associated with the second cache portion. The method comprises detecting that a data access criteria of the second memory portion is fulfilled, establishing that first data stored in the second memory portion is related to a first application running on the first processing unit, allocating at least a part of the first memory portion to the first application based on cache information, and migrating the first data to the part of first memory portion.
Public/Granted literature
- US20220058123A1 METHODS AND NODES FOR HANDLING MEMORY Public/Granted day:2022-02-24
Information query
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