Invention Grant
- Patent Title: Optimization of physical cell placement for integrated circuits
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Application No.: US17139016Application Date: 2020-12-31
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Publication No.: US11714944B2Publication Date: 2023-08-01
- Inventor: Vito Dai , Edward Kah Ching Teoh , Ji Xu , Bharath Rangarajan
- Applicant: Motivo, Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Motivo, Inc.
- Current Assignee: Motivo, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Barclay Damon LLP
- The original application number of the division: US16185521 2018.11.09
- Main IPC: G06F30/30
- IPC: G06F30/30 ; G06F30/392 ; G06F30/18 ; G06F30/33 ; G06F30/39 ; G06F30/327 ; G06F30/398 ; G06F30/00 ; G06F30/13 ; G06F119/18

Abstract:
In an embodiment, a method for optimizing an integrated circuit physical design for an integrated circuit. A physical design graph includes a plurality of physical design sub-configurations, each including a placement of a group of physical cells and having annotated characteristics. The method includes identifying, in the integrated circuit physical design, a first physical design sub-configuration including a first placement of a first group of the physical cells and having first annotated characteristics, the first annotated characteristics being outside target characteristics. The method includes selecting from the physical design graph, based on the first group of the physical cells and the target characteristics, at least a second physical design sub-configuration including a second placement of the first group of the physical cells and being within the target characteristics. The method includes replacing the first physical design sub-configuration in the integrated circuit physical design with the second physical design sub-configuration.
Public/Granted literature
- US20210124865A1 DESIGN AND OPTIMIZATION OF PHYSICAL CELL PLACEMENT FOR INTEGRATED CIRCUITS Public/Granted day:2021-04-29
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