A phase change (PCM) memory device that includes a PCM and a resistance-capacitance (RC) circuit. The PCM has one or more PCM properties, each PCM property has a plurality of PCM property states. As the PCM property states of a given property are Set or Reset, the PCM property states each produce an incremental change to a property level of the respective/associated PCM property, e.g., PCM conductance. The incremental changes to property level of the PCM memory device are in response to application of one or more of a pulse number of voltage pulses. The RC circuit produces a configuring current that flows through the PCM in response to one or more of the voltage pulses. The configuring current modifies one or more of the incremental changes to one or more of the property levels so that the property level changes lineally with respect to the pulse number. The PCM memory device has use in a synapse connector, e.g., in a memory array. The memory array can be used to store and/or read memory values associated with one or more of the property levels. The memory values can be used as weighting values in a neuromorphic computing application/system, like a neural network.