Invention Grant
- Patent Title: Through silicon via and method of manufacturing the same
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Application No.: US17394372Application Date: 2021-08-04
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Publication No.: US11715669B2Publication Date: 2023-08-01
- Inventor: Shih-Ping Lee , Tse-Hsien Wu , Pin-Chieh Huang , Yu-Hsiang Chien , Yeh-Yu Chiang
- Applicant: Powerchip Semiconductor Manufacturing Corporation
- Applicant Address: TW Hsinchu
- Assignee: Powerchip Semiconductor Manufacturing Corporation
- Current Assignee: Powerchip Semiconductor Manufacturing Corporation
- Current Assignee Address: TW Hsinchu
- Agent Winston Hsu
- Priority: TW 9137019 2020.10.26
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/768

Abstract:
A method of manufacturing a through silicon via (TSV) is provided in the present invention, including steps of forming a TSV sacrificial structure in a substrate, wherein the TSV sacrificial structure contacts a metal interconnect on the front side of the substrate, performing a backside thinning process to expose the TSV sacrificial structure from the back side of the substrate, removing the TSV sacrificial structure to form a through silicon hole, and filling the through silicon hole with conductive material to form a TSV.
Public/Granted literature
- US20220130725A1 THROUGH SILICON VIA AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2022-04-28
Information query
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