Invention Grant
- Patent Title: Fan-out package structure and method
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Application No.: US17460626Application Date: 2021-08-30
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Publication No.: US11715681B2Publication Date: 2023-08-01
- Inventor: Tzu-Wei Chiu , Sao-Ling Chiu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- The original application number of the division: US16656019 2019.10.17
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L23/498 ; H01L23/00 ; H01L21/48 ; H01L21/56 ; H01L21/683 ; H01L23/532 ; H01L21/60
Abstract:
A method comprises embedding a semiconductor structure in a molding compound layer, depositing a plurality of photo-sensitive material layers over the molding compound layer, developing the plurality of photo-sensitive material layers to form a plurality of openings, wherein a first portion and a second portion of an opening of the plurality of openings are formed in different photo-sensitive material layers and filling the first portion and the second portion of the opening with a conductive material to form a first via in the first portion and a first redistribution layer in the second portion.
Public/Granted literature
- US20210391242A1 Fan-Out Package Structure and Method Public/Granted day:2021-12-16
Information query
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