Invention Grant
- Patent Title: Semiconductor devices with recessed pads for die stack interconnections
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Application No.: US17237496Application Date: 2021-04-22
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Publication No.: US11715696B2Publication Date: 2023-08-01
- Inventor: Ruei Ying Sheng , Andrew M. Bayless , Brandon P. Wirz
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L25/065 ; H01L21/768 ; H01L21/48 ; H01L21/50

Abstract:
Semiconductor devices having electrical interconnections through vertically stacked semiconductor dies, and associated systems and methods, are disclosed herein. In some embodiments, a semiconductor assembly includes a die stack having a plurality of semiconductor dies. Each semiconductor die can include surfaces having an insulating material, a recess formed in at least one surface, and a conductive pad within the recess. The semiconductor dies can be directly coupled to each other via the insulating material. The semiconductor assembly can further include an interconnect structure electrically coupled to each of the semiconductor dies. The interconnect structure can include a monolithic via extending continuously through each of the semiconductor dies in the die stack. The interconnect structure can also include a plurality of protrusions extending from the monolithic via. Each protrusion can be positioned within the recess of a respective semiconductor die and can be electrically coupled to the conductive pad within the recess.
Public/Granted literature
- US20220344270A1 SEMICONDUCTOR DEVICES WITH RECESSED PADS FOR DIE STACK INTERCONNECTIONS Public/Granted day:2022-10-27
Information query
IPC分类: