Invention Grant
- Patent Title: Wafer on wafer bonding structure
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Application No.: US17186984Application Date: 2021-02-26
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Publication No.: US11715723B2Publication Date: 2023-08-01
- Inventor: Ming-Fa Chen , Chao-Wen Shih , Sung-Feng Yeh
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/00 ; H01L25/065 ; H01L25/18 ; H01L25/00 ; H01L21/768 ; H01L21/304 ; H01L21/306
Abstract:
A package structure and method of manufacturing is provided, whereby a bonding dielectric material layer is provided at a back side of a wafer, a bonding dielectric material layer is provided at a front side of an adjoining wafer, and wherein the bonding dielectric material layers are fusion bonded to each other.
Public/Granted literature
- US20220278074A1 Wafer on Wafer Bonding Structure Public/Granted day:2022-09-01
Information query
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