- Patent Title: Hardware-assisted dynamic random access memory (DRAM) row merging
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Application No.: US17025157Application Date: 2020-09-18
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Publication No.: US11721384B2Publication Date: 2023-08-08
- Inventor: Jagadish B. Kotra
- Applicant: ADVANCED MICRO DEVICES, INC.
- Applicant Address: US CA Santa Clara
- Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee Address: US CA Santa Clara
- Main IPC: G11C11/406
- IPC: G11C11/406 ; G11C11/408 ; G11C11/409

Abstract:
Hardware-assisted Dynamic Random Access Memory (DRAM) row merging, including: identifying, by a memory controller, in a DRAM module, a plurality of rows storing identical data; storing, in a mapping table, data mapping one or more rows of the plurality of rows to another row; and excluding the one or more rows from a refresh the DRAM module.
Public/Granted literature
- US20210327494A1 HARDWARE-ASSISTED DYNAMIC RANDOM ACCESS MEMORY (DRAM) ROW MERGING Public/Granted day:2021-10-21
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