Invention Grant
- Patent Title: Method for fabricating semiconductor memory and the semiconductor memory
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Application No.: US17391399Application Date: 2021-08-02
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Publication No.: US11721585B2Publication Date: 2023-08-08
- Inventor: Jack Zezhong Peng
- Applicant: Jack Zezhong Peng
- Applicant Address: US CA San Jose
- Assignee: Jack Zezhong Peng
- Current Assignee: Jack Zezhong Peng
- Current Assignee Address: US CA San Jose
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L21/50 ; H01L25/065 ; H01L25/00

Abstract:
A semiconductor memory fabrication method and the semiconductor memory are involved in semiconductors production and fabrication processes. The semiconductor memory manufacturing method of the present invention includes the following steps: 1) Using a semiconductor integrated circuit manufacturing process, a basic memory module array being fabricated on a wafer where the basic memory modules have IO circuit interfaces; 2) Dicing the wafer to obtain memory chips; 3) Packaging the separated memory chip. In step 1), the IO circuit interfaces of the basic memory modules adjacent in the orthogonal directions are connected by interconnection lines; and according to the predetermined memory capacity, step 2) is to determine the number of basic memory modules contained in the chip and the position of the edge line of the memory chip so that the interconnections across the edge line are cut off so to separate the entire memory chip from the wafer by dicing along the edge line of the memory chip. Using the technique of the present invention, memory chips of multiple different capacities can be produced with solely one set of masks or reticles, which greatly reduces the manufacture cost.
Public/Granted literature
- US20220037207A1 METHOD FOR FABRICATING SEMICONDUCTOR MEMORY AND THE SEMICONDUCTOR MEMORY Public/Granted day:2022-02-03
Information query
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